A single chip system for ECG feature extraction

Sasa Knezevic, Radovan Stojanovic, Dejan Karadaglic, Bogdan Asanin

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    91 Downloads (Pure)

    Abstract

    This paper proposes an on-line system for feature extraction from ECG signal. The QRS detector, RR interval calculator, heart rate calculator and additional modules are developed in VHDL code and embedded in a single FPGA chip. The overall design has a low hardware occupation, 1838 LEs, and minimal number of setting parameters, only two, sampling and clock rates. The achieved accuracy is 97.5%. As such, it is very suitable for embedding in wearable health care systems, portable instruments and telemedicine devices. The methodology for QRS detection, system architecture and preliminary testing results are presented.
    Original languageEnglish
    Title of host publicationEmbedded Computing (MECO), 2013 2nd Mediterranean Conference on
    PublisherIEEE
    Pages88-92
    Number of pages5
    ISBN (Print)978-9940-9436-1-5
    DOIs
    Publication statusPublished - 2013

    Keywords

    • FPGA
    • discrete wavelet transform
    • QRS complex
    • RR interval
    • heart rate detection

    Fingerprint Dive into the research topics of 'A single chip system for ECG feature extraction'. Together they form a unique fingerprint.

  • Cite this

    Knezevic, S., Stojanovic, R., Karadaglic, D., & Asanin, B. (2013). A single chip system for ECG feature extraction. In Embedded Computing (MECO), 2013 2nd Mediterranean Conference on (pp. 88-92). IEEE. https://doi.org/10.1109/MECO.2013.6601325